Echo Dot Digital Output Modification

[AP]

A slightly lighter topic for change.
I quite like the Echo Dot for it's easy way to play music and I always wanted to connect the Dot to the main stereo system, which has only digital inputs. There is no digital out from any of the Echo devices. Only the more expensive Link has digital out, but lacks other functionality (no voice control).
Some inspiration here:
https://hackaday.io/project/28109-hi-fi-digital-audio-from-the-echo-dot
There are many tear down videos and photos of various Dot generations on the internet, those helped to identify that the easiest access to the digital audio lines would be with the 3rd gen, also to identify the main components etc.
In principle the mod should be super simple - find the internal DAC/speaker amp, locate the pins with I2S signals, tap the signals and feed an SPDIF transceiver chip. In reality, it is always a bit more complicated

Main challenges:

• Master clock frequency is 200Fs, not a power of 2 multiple (e.g. 256Fs) needed for most digital transceivers.
• I2S logic signaling levels 1.8V.
• Not easily accessible I2S signals - QFN package.
• Lack of physical space if the original assembly should remain intact.

I originally wanted to keep the onboard DAC and built-it in speaker in place for standalone use, which eventually turned out to have no useful purpose. But for the reasons mentioned above the only viable option seemed to take the I2S signals out and feed an FPGA based SPDIF transmitter. So, here it is. The I2S and master clock are tapped on the pads of the DAC and fed into a 74LCX541MTC buffer to drive the output cable and also do level conversion from 1.8V to 2.5V. For that an extra 2.5V regulator 1117-2.5 was added. The signals are then sent over a short&thin CAT5 cable into the Avarice board in minimum hardware configuration to run the FPGA. 5V power for the FPGA board is also taken from the Dot's USB power connector. The FPGA then takes 200Fs master clock and creates 512Fs clock (/25, *32,*2) and a readily available IP core I2S interface and SPDIF transmitter was put it to complete the signal chain. Some housekeeping logic for monitoring the frequency of the master clock and clock management/resetting the design was also added. And it works! The digital out via BNC feeds the CZAP in the main stereo system and it sounds quite well.
One observation, the Dot volume control works in the digital domain, so to use the Dot as a digital transport the volume has to be maxed out, which makes the internal speaker useless for standalone operation. I originally though it would be done in the DAC chip leaving the I2S at full level. After removing the line out connector the speaker is muted anyway as I left the contact which detects the line out cable open. A few pics below, any questions or comments, please ask.
Regards,
Pavel

[cert]

Hi,

this is really cool. I m using a audio interface where the I2S inputs dont need clocks (LRCLK/BCLK/MCLK). Do you think i can just connect the DOUT to the DIN and it should work?

cert

[AP]

Hi cert,
I2S interface that doesn't need clocks? Can you please share some details? I cannot imagine how such device would work without any means of synchronization of the data stream. I don't think this is gonna work, but feel free to share more details and maybe we can find a way around.
Regards,
Pavel